1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, to a surface mount type semiconductor device and a method of manufacturing the same.
2. Description of the Prior Arts
In a surface mount type semiconductor device, the distal end of a lead terminal is bent parallel to the surface and electrically connected to a wiring pattern formed on a circuit board surface. As any holes need not be formed in the circuit board to receive the lead terminals for electrical connections in such semiconductor devices, they are widely used in this field.
Currently used standard surface mount type semiconductor devices such as a memory are classified into vertical mount type semiconductor devices called SVPs and vertically mounted on a circuit board surface and horizontal mount type semiconductor device called TSOPs and horizontally (parallelly) mounted on a circuit board surface.
FIGS. 1A and 1B are a front view showing a conventional vertical surface mount type semiconductor device and a side view showing the mount direction on a circuit board, respectively. FIGS. 1C and 1D are a plan view showing a conventional horizontal surface mount type semiconductor device and a side view showing the mount direction on the circuit board, respectively. Note that FIG. 1E is a perspective view of a portion X.sub.1 in FIG. 1A.
In a vertical mount type semiconductor device 103 in FIGS. 1A and 1B, a plurality of lead terminals 15 and support leads 16 extend from one long side surface 43 of a package main body 41 in parallel to a major surface 42. Distal ends 17 and 18 of the lead terminals 15 and the support leads 16 are perpendicularly bent, and the semiconductor device 103 is vertically mounted on a circuit board 300. The support leads 16 are members for supporting the semiconductor device 103 and not related to electrical connection. As shown in FIGS. 2A to 2D, in a lead frame forming process 60, a lead frame 67 having a die pad portion 62 supported by suspenders 63, lead terminals 15a, and support leads 16a is formed from a frame 64. In a chip mounting and bonding process 70, a semiconductor chip 71 is fixed on the die pad portion 62, and the electrodes of the semiconductor chip 71 are connected to the corresponding lead terminals 15a by bonding wires 72. In a mold sealing process, sealing with a resin 83 and formation of the package main body 41 are performed. In a lead terminal forming process 93, the lead terminals 15a and the support leads 16a are cut off from the lead frame 67, and the distal ends are bent to form the lead terminals 15 and the support leads 16 having the distal ends 17 and 18, respectively (FIG. 1E).
In a horizontal mount type semiconductor device 203 in FIGS. 1C and 1D, a plurality of lead terminals 45 extend from two long side surfaces 53 and 54 of a package main body 51 in parallel to a major surface 52. Distal end portions 47 of the lead terminals 45 project from the same plane as the major surface 52 and are bent parallel to the major surface, and the semiconductor device 203 is horizontally mounted on the circuit board 300. As shown in FIGS. 3A to 3D, in the lead frame forming process 60, a lead frame 68 having the die pad portion 62 supported by the suspenders 63 and lead terminals 45a provided on both the sides of the die pad portion 62 is formed from the frame 64. In the chip mounting and bonding process 70, the semiconductor chip 71 is fixed on the die pad portion 62, and the electrodes of the semiconductor chip 71 are connected to the corresponding lead terminals 45a by the bonding wires 72. In the mold sealing process, sealing with a resin 84 and formation of the package main body 51 are performed. In a lead terminal forming process 94, the lead terminals 45a are cut off from the lead frame 68, and the distal ends are bent to form the lead terminals 45 having the distal end portions 47 (FIG. 1D).
As described above, the vertical mount type package has a shape entirely different from that of the horizontal mount type package. Accordingly, as shown in FIGS. 2A to 2D and 3A to 3D, different manufacturing processes are performed in these packages.
On the other hand, Japanese Utility Model Publication No. 2-49703 discloses a package in which, as shown in FIGS. 4A to 4D, lead terminals 57 extending from a package main body 56 are perpendicularly bent to reach an adjacent surface, thereby coping with both the vertical and horizontal mount type semiconductor devices.
In the conventional technique in FIGS. 1A to 3D, the lead frame forming, the chip mounting and bonding, the mold sealing, and the lead terminal forming processes are independently performed for the vertical and the horizontal mount type semiconductor devices. For this reason, when both the vertical and the horizontal mount type packages are to be manufactured, the processes are almost doubled as compared to the manufacture of only one type. In addition, since the assembling process is changed, a reliability evaluation for humidity resistance and the like is required for each package.
In the conventional technique in FIGS. 4A to 4D, all the lead terminals have the same shape, so the lead terminals of the standardized SVP (vertical mount type) or TSOP (horizontal mount type) cannot be used. As a result, this method cannot be applied to the conventional package mounting line for the SVPs or TSOPs.